Ramesh Karri Polytechnic University of New York
We are requesting support for travel grants to graduate students and postdoctoral researchers to attend the IEEE International Workshop on Design and Test of Defect-Tolerant Nanoscale Architectures (NANOARCH'05) to be held in conjunction with with the VLSI Test Symposium May 1, 2005 at the Lodge at Rancho Mirage, Palm Springs, CA, USA. Intellectual Merit: The NANOARCH workshop is building a community of researchers in the emerging area of Computer Aided Design and Test Tools, Fault and Defect Tolerant Architectures etc. for the emerging nanotechnology based computing systems. Broader Impact: We envision a community of researchers and practitioners drawn from several disciplines (electrical engineering, computer engineering, computer science, physics, biology, chemistry, mechanical engineering). We envision this NANOARCH community to be the focal point for research in this important area of nano architectures, nano computing, nanoelelctronics and nanocomputing systems. We will encourage participation from graduate student and postdoctoral researchers including those from EPSCOR states, women and minorities by advertising this workshop in appropriate forums.
