A new generation of mobile wireless devices that are always connected through a multitude of standards for different indoor and outdoor environments is emerging. This project seeks to unify these various algorithms and architectures through identifying commonalities in representation and translation. As wireless data rates exceed 100 Mbps and approach 1 Gbps, the joint design of algorithms and application specific architectures is a major challenge that can benefit from new approaches to flexible algorithm and architecture integration. A new and unified approach for Application Specific Instruction Processor (ASIP) architectures for wireless systems is planned that is based on three components. First, emerging iterative receiver structures for high data rate multiple antenna (MIMO) systems that can be expressed as Factor Graphs will be analyzed. Then, the algorithm mapping to fixed application specific systems and the area, time, and power complexity for these fixed VLSI architectures will be explored. Third, since system flexibility is an important concern, architectures mapping efficiency and design exploration will be performed on programmable research ASIPs. The broader impact of this project will include web distribution through the Rice Connexions educational project, undergraduate student education through research in the Rice CMC-LAB, and also summer internships for underrepresented groups in the lab. Research interaction with Nokia and Texas Instruments scientists and with leading international research groups at the University of Oulu and Tampere University of Technology in Finland will create global coordination and contribution to new systems.
