The purpose of this exploratory research is to investigate whether asynchronous (clockless) VLSI techniques can accelerate the development of organic field-effect transistors and printing technology for the design and fabrication of flexible electronic circuits. Organic semiconductors are being considered as alternative materials to conventional silicon-based electronics, possibly enabling a new generation of low-cost, mechanically flexible, easily manufactured electronic devices. Asynchronous logic, which does not rely on timing assumption, may be the best design method for such technologies where the parameters are not well controlled and the implementation of a global clock-network is very difficult. The argument is that, since all parameter variations affect the timing, a logic that is independent of the timing and that does not use a clock, will tolerate extreme parameter variations. The main goal of this research is to apply asynchronous logic to the design of digital systems in printed electronics. The hope is that, by relaxing the requirements on the physical parameters imposed by timing constraints, the currrent state of the technology may become ``good enough'' for implementing digital circuits without further improvement. A concrete target is to design and fabricate the very first microcontroller in printed electronics, more specifically with inkjet printer technology.
Organic semiconductors will not replace current silicon-based technology as the performance characteristics are very different. But other properties of the devices---low cost, light weight, flexibility, and short fabrication time---open the door to new exciting applications. Obvious ones come to mind: active RFID and smart labels, wearable electronics with health-care and defense applications, biometric and chemical sensors with added intelligence, large-area sensors, active matrix backplane for displays, mobile communications, energy. But probably the most interesting ones are still to be discovered. The idea of being able to print circuits on an inkjet printer with one single type of polymer and in ambient conditions is very appealing because of the potential simplicity and availability of the technique. Comparing the price of a current IC fabrication facility (billions of dollars) to the price of an inkjet printer (thousands of dollars) is enough to appreciate the huge potentials of the technology. An added advantage in an academic environment is that the idea of printing their own circuits would be very exciting to students...
Organic semiconductors are being considered as alternative materials to conventional silicon-based electronics, possibly enabling a new generation of low-cost, mechanically flexible, easily manufactured electronic devices. Obviously, organic semiconductors will not replace inorganic (silicon and other) technologies as the performance characteristics are very different. Because of the ``disordered'' structure of the materials, device speed will always be modest compared to silicon-based circuits; but other properties of the devices---low cost, light weight, flexibility, and short fabrication time---open the door to new exciting applications. Imagine being able to print a circuit on a piece of paper! Obvious applications come to mind: RFID and smart labels, smart cards, wearable electronics with medical and military applications, biometric and chemical sensors, large-area sensors and imagers. Because of the fabrication difficulties involved, in particular instability of certain materials in air, and because of the physical deformations caused by mechanical flexing, a circuit methodology that can tolerate huge variations in timing seems an ideal match for this new technology. The purpose of this project was to explore the possibility of using asynchronous quasi-delay insensitive circuit logic for the design and fabrication of organic electronics using inkjet printing technology. The reason is that because clockless logic is mostly insensitive to delay variation, it is also much more resilient to all parameter variations. The main difficulty turned out to be finding collaborators with experience in the technology and willing to collaborate as research partners. We had established contacts with several groups, but in all cases, our accessing of the fabrication technology was dependent on a financial contribution from our side that was incommensurate with the size of the award. As a consequence, we were unable (so far) to test the technology by actually fabricating circuits within the time period of the contract. The research has concentrated on developing analytic and synthesis methods to guarantee the robustness of an asynchronous (QDI) circuit in terms of its "static noise margin." The method is applicable to any technology (e.g. silicon-based or organic) and also to clocked circuits, provided that the main physical parameters of the technology are known. The method makes it possible to quantify a circuit’s robustness in the face of both timing and functional failures. More precisely, it is possible to calculate the probability that a circuit will fail given a target noise margin. The results will be applied at Microsoft to actually design and fabricate organic printed electronic devices. An intellectual merit of the research is to establish reliability and robustness as a firsr-class and quantifiable objective for the circuit designer next to speed performance and power consumption. Caltech students (undergraduates and graduates) have been exposed to the issues as part of the VLSI class.
