Due to aggressive technology scaling and increasing operating frequencies, interconnect has become the main performance limiting factor in integrated circuits. Consequently, interconnect synthesis plays a vital role in facilitating today's mixed-signal designs, but current design automation techniques fail to include deep sub-micron interconnect effects directly into the synthesis process, resulting in costly redesign. To promote synthesis strategies that handle the increased complexity of mixed-signal nanoscale integrated circuits, the PI proposes a new interconnect synthesis paradigm that evaluates the circuit signal integrity and performance during interconnect synthesis. Under this new paradigm, interconnect in mixed-signal systems is modeled, optimized and synthesized taking all aspects of the system's interconnect into account. This includes analog interconnect structures and integrated components as well as interconnect in digital portions of the design. To facilitate and develop our new system-oriented interconnect synthesis paradigm for mixed-signal nanoscale ICs, the PI will research and create: (i) analytical modeling, optimization and synthesis methodologies that facilitate generalized design automation in integrated mixed-signal and system-on-chip designs; (ii) system-oriented interconnect synthesis strategies utilizing statistical modeling methodologies incorporating inductance to produce layout that meets design constraints. To further prepare students for mixed-signal interconnect design, the PI will employ dynamically changing computer engineering curriculum in both his graduate class, which utilizes innovative semester-long projects emphasizing original research, and his undergraduate class, which stresses the fundamentals of the VLSI design process and provides students with an intuitive understanding of critical concepts.
