Reducing the power consumption of computing devices is a highly desirable goal for modern digital circuits. This project seeks new methods to lower power consumption of digital circuits by exploiting the inherent error resiliency of emerging application domains such as signal and image processing, computer vision, and machine learning. By giving up some arithmetic accuracy, it is possible to design approximate circuits with dramatically lower power consumption and smaller silicon footprint. Low-power and reliable operation of computing systems is key for the continued push for smaller, faster and increased functionality for these systems. Other than the obvious technical impact to industry, broader impacts of this project would include new and existing course development and development of a technical workforce, as it will involve a number of graduate and undergraduate students.
This project investigates new methods for the synthesis of approximate circuits that will be generated directly from their high-level behavioral descriptions. Working directly from high-level behavioral descriptions gives larger leverage for approximate circuit generation and easier incorporation within standard design flows. The novel synthesis approach is inspired by program analysis techniques used in software engineering. The PIs propose: (1) techniques for intelligent analysis of hardware designs to produce approximate circuits where designers can trade-off power and accuracy in a controlled fashion; (2) techniques that enable fast and efficient design space exploration of approximate computing designs; and (3) support circuitry that leads to low-area overhead for either low-power or error-resilient deployments. This project will result in a software tool that will fit within standard integrated circuit design flows, and will take as input a system accurately described in a behavioral hardware description language and will produce as an output approximate computing circuits along with their support circuitry. The tool will enable designers to make appropriate tradeoff decisions between arithmetic accuracy, power consumption, error resiliency and hardware overhead.
