The goal of this research is to design, construct, and evaluate an interactive VLSI designer's assistant called "Agent". The assistant captures the design graphically; estimates its speed, space, and power (S/S/P) complexity; explains its analysis; indicates potential trouble spots; and suggests changes. To construct the assistant, several elements are required: a design language (Gdl) as a communication medium between the designer and the assistant, and as the external view of the internal design representation (database); procedures to mechanically estimate the S/S/P complexity of a Gdl description; and an interactive tool to edit and manage the design, invoke the analytical procedures, explain results, and make suggestions. To gain experience with the design language and Agent, it is intended to design, fabricate, and test a Content Addressable Processor. The Content Addressable Processor approach is being applied to first order logic, semantic nets, and production rules, and shows promise as a new kind of non-numeric computing architecture.
