Although reconfigurable computing (RC) devices have been widely shown to have significant performance and power advantages compared to other computing devices, mainstream usage of such devices has been resisted due to increased application design complexity caused by non-mainstream high-level synthesis, complex low-level debugging, lengthy compilation times often requiring hours or days, a lack of code portability, prohibitive device costs, among other challenges. To address these problems, this study introduces RC virtualization to reduce the semantic gap between high-level applications and physical RC devices with hundreds of thousands of fine-grained resources. Whereas physical RC devices must be fine grained for flexibility and cost effectiveness, the proposed virtual RC devices, which are implemented atop such physical devices, can be specialized to the needs of different application domains to hide physical device complexity. As a result, the proposed virtualization enables rapid RC compilation that can complete in seconds as opposed to hours. Rapid RC compilation in turn enables mainstream design methodologies for debugging. Virtualization also enables application portability across physical RC devices, similar to how virtual machines achieve portable software code, in addition to tool portability that enables third-party tools to target any RC system. Finally, by combining virtualization with high-level synthesis from standardized parallel languages for heterogeneous accelerators (e.g., OpenCL), this study enables mainstream RC usage by enabling the design flow used by other mainstream computing devices.
