Intellectual Merit: The proposed program will develop nanowire transistors for low-noise operation, which has not been addressed extensively to date in most material systems. The proposed work will focus on core/shell nanowire structures, which have the potential to provide well-controlled interfaces comparable to those which have enabled high-performance heterostructures devices in a number of materials. This well-integrated effort will correlate the device performance to the materials, structure and bias conditions of the devices, and will provide a means to utilize the measured noise characteristics to understand the overall conduction processes within the devices. Broader Impact: The proposed research would provide new device concepts and new insights for technologically relevant developments in nanowire-based electronics, including applications in RF circuitry. The study will explore an approach which could be broadly applied to a number of semiconductor materials of interest for various device applications. The proposed effort also includes an integrated education and outreach program aimed at addressing challenges in nanotechnology-related education/training arising from the interdisciplinary nature of many of the projects, and aimed at providing opportunities for participants from under-represented groups. The proposed education and outreach program builds from programs which address the specific challenges arising from this interdisciplinary area. The proposed program includes development of a 1-D Nanoelectronics course and integrated research and professional development experiences for undergraduates.

Project Report

The overall focus of this program was in understanding noise in nanowire transistors. Toward this goal, the program i) characterized noise in nanowire transistors with various geometries, ii) investigated noise as a function of bias point/regime and iii) developed a model for current and noise characteristics that incorporates contact and channel effects. The study considered a class of transistor devices that can provide scaling to ultrashort channel lengths, in order to achieve high speed/low power operation, and novel electronic components including relatively high performance thin-film electronics for displays, flexible electronics and large-area electronics. The intellectual merit of the program included a fundamental study of contact and channel effects and development of associated models for device conductance and noise properties. Collectively, the models and experimental findings allow analysis of noise properties of transistors with various channel materials, contact properties and device geometries. The insights and methodologies developed in this program can provide a framework for selecting optimum materials systems, device geometries and passivation techniques for devices with noise properties suitable for demanding applications. The broader impacts of the program include the development of appropriate models and analysis to evaluate fundamental performance limits of transistor devices with broad technological relevance. The class of devices studied in this program have potential applications in flexible/transparent thin film-electronics, as well as extensions of mainline electronics for computing and communication systems. In addition, the program provided professional development experiences for graduate students and new insights that can be incorporated into classes on electronic devices and circuits.

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Purdue University
West Lafayette
United States
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