Intellectual Merit: This project is awarded under the Nanoelectronics for 2020 and Beyond competition, with support by multiple Directorates and Divisions at the National Science Foundation as well as by the Nanoelectronics Research Initiative of the Semiconductor Research Corporation. The research will provide an alternative to CMOS technology based on an all-spin logic device. Although nanomagnetism plays a fundamental role in existing magnetic storage technologies, the implementation of processing has traditionally required the conversion of magnetic information (spin) to charge and then back to spin after the processing step is complete. This approach, however, realizes none of the advantages of working with pure spin currents, which promise much lower power dissipation and potentially greater scalability. An all-spin logic concept that has been inspired by a decade of progress in semiconductor and metallic spintronics would achieve all-spin operation, but only if substantial materials engineering, processing, and integration challenges can be overcome. An interdisciplinary team has been assembled that is uniquely positioned to address these challenges, which include (1) engineering of bits which can function as either magnetic tunnel junction spin injectors (for inputs) or giant magnetoresistance (GMR) sensors (for low impedance outputs), (2) integrating these bits with interconnecting channels fabricated from either normal metals, graphene or ZnO, (3) developing a process that will provide for isolation of the input and output stages of the bits while preserving the desirable spin transport properties of the interconnects, (4) a test protocol grounded in both spin transport physics and circuit design principles, and (5) a clear path for integration. The approach addresses one of the severe roadblocks to practical spintronics, which is the need for efficient spin transport across interfaces while meeting the simultaneous demands of an economic and fully scalable processing technology. The team consists of an expert on perpendicular magnetic anisotropy materials and spintronic device engineering (Wang), a spin-transport physicist (Crowell), a circuit design and fabrication engineer (Kim), a semiconductor materials and device engineer (Koester), and a semiconductor spintronic materials engineer (Ding, an international collaborator).
Broader Impacts: The unique combination of materials engineering, device physics, process engineering, and circuit design in this program will lead to a new family of logic devices. Just as importantly, these four technical components will play a critical role in training the engineers and scientists who will be carrying out nanoelectronic research well beyond 2020. The team provides true interdisciplinary mentorship for graduate students in multiple departments. In addition to technical training in at least two disciplines, the PIs will emphasize student interaction with industrial partners and participation in activities that allow students to explain nanotechnology and spintronics to the public. The participants in this program will also interact continuously with an active community of researchers in magnetism, semiconductor device physics at the University of Minnesota and in the surrounding community. This will prepare the diverse group of project participants for careers spanning a continuum from basic research to the implementation of new technologies. Mentorship of younger students, including undergraduate researchers, is also a critical component of the program. The project will proactively recruit minorities, women, and under-represented groups as well as leverage existing university-wide efforts for promoting diversity and outreach.