The broader impacts/commercial potential of this Small Business Innovation Research (SBIR) Phase I project is that the deposition techniques used to deposit the lattice matching materials are scalable in wafer area to 200mm and 300mm wafer processing and are already found in today's CMOS foundries. Both factors, using large area deposition process and leveraging fully depreciated CMOS fabs, lead to significant reduction in overall packaged device cost. In this fashion, these lattice matching materials on Si will result in a new industry standard wafer from a US company supplying globally 200mm and 300mm wafers to light emitting diode and power semiconductor industries.

This Small Business Innovation Research (SBIR) Phase I project is focused on converting the surface of large area silicon wafers into a bulk-like quality Gallium Nitride (GaN). The wafer technology will be used by light emitting diode and power semiconductor manufacturers to grow the brightest and most efficient GaN based devices. The novel technology under this Phase I project is based on depositing a patent pending purely metallic alloy that both grades the lattice constant from Si to GaN and counter balances residual thermal mismatch to maintain a flat wafer. By removing both thermal and lattice mismatch, growth of low defect density GaN is promoted on large area wafers leading to bulk GaN quality material efficiencies.

Project Report

The project’s objective is the establishment of a new approach to fabricating GaN templates for high quality GaN growth on silicon wafers. These templates will serve the LED and power semiconductor industry by offering the quality achieved today with GaN wafers – which are very expensive and largely unobtainable – on low cost silicon wafers. Silicon-based GaN currently requires complex MOCVD growth protocols that still don’t sufficiently solve the problems introduced by growing GaN on lattice and thermal expansion mismatched substrates. For successful commercialization in an already mature market, we proposed a revolutionary technology to achieve ultra-low defect GaN templates without the use of complicated defect filtering or deposition of very thick layers. Our basic approach is to use a novel metal alloy as an interlayer that would provide both lattice parameter and CTE matching for low-stress GaN thin-films during high temperature deposition and after cooling to room temperature. We referred to this alloy as "Zr-rich crystal matched metal alloy" throughout our SBIR application. The metal alloy layer functions as the "handshake layer" between the substrate lattice and the GaN lattice performing the same function as the expensive and challenging buffer layers of graded, stepped, or otherwise engineered III-nitride buffers. That is, the layers have defects originating at the interface with the mismatched substrate, then filter or annihilate the defects through their thickness until a relatively low defect and lattice matched upper surface emerges and allows low defect GaN growth. The difference with the Tivra buffer is that the metal alloy, because of the nature of metal films with their inherent ductility, filter the defects in a much thinner layer and much more effectively than even the thickest III-nitride buffers. The Tivra metal alloy buffer, by virtue of its ability to filter defects in a thin layer, presents a lattice matched surface on which GaN can be grown just as it is grown on a lattice-matched surface in GaN on GaN homoepitaxy. Key outcomes: A seed crystal comprising a purely metallic interlayer was successfully deposited using low cost PVD, along with a related reactive metal nitride of Zr resulting in an LED template that is MOCVD-ready. The PVD system conditions were determined and a stable software based recipe automated routine deposition of the films, total film thickness not exceeding 500nm on sapphire and on Si. For the first time, GaN was grown on Si 111 wafers without the use of alternating periods of AlN and GaN or complex superlattices grading AlN down to GaN in an MOCVD chamber. A standard, high temperature MOCVD recipe was used for a metal alloy coated template on sapphire and silicon. A pure metal was found to form an effective defect annihilation layer, significantly impeding the formation and passage of threading dislocations formed at the interface between the metal alloy and the thin nitride coated foreign substrate. This was shown for both sapphire and silicon. The latter has an additional implication in other related compound semiconductor fields utilizing the solid solution of GaN and its alloys with Al and In. Potentially, interspersing the metal alloy studied here between critical devices layers can annihilate extended defects formed at interfaces. In summary, the metal acts as both a lattice and CTE matching interlayer and has the additional property of healing deleterious defects over distances as short as tens of nanometers. The standard MOCVD recipe complexity was significantly reduced when using the metal alloy latticed match to GaN strategy. For example, the initial steps in MOCVD have been designed to treat the surface of sapphire were found unnecessary when using the purely metallic interlayer. The key learning from this grant is that by having an MOCVD-ready surface comprised of the metal alloy it is possible to simply anneal the wafer in nitrogen and then ramp straight to high temperature for deposition of a thin 10nm nucleation layer, either GaN or AlN followed by final 2D growth of GaN at >1000°C.

Project Start
Project End
Budget Start
2014-07-01
Budget End
2014-12-31
Support Year
Fiscal Year
2014
Total Cost
$150,000
Indirect Cost
Name
Tivra Corporation
Department
Type
DUNS #
City
Oakland
State
CA
Country
United States
Zip Code
94606