The development of ultra-high-speed digital computing machinery, capable of throughputs well beyond a 109 Instructions per second (IPS) rate, is essential to the development of future high performance communication, radar, control, image processing, as well as multidimensional signal processing systems. This research is directed towards that goal. The research is based on the recent advancements made to a 2000 year old branch of mathematics known as "residue arithmetic". The Residue Number System (RNS) has received attention over the last two decades because the advances in memory technology combined with the system's ability for high-speed arithmetic provide attractive solutions in many real-time Digital Signal Processing (DSP) applications. More recently the Quadratic Residue Number System (QRNS) was introduced which offers significant hardware savings and throughput enhancements for the case of complex multiplicative intensive environments. The proposed research will extend the concept of the QRNS to a higher order system, the so called Polynomial Residue Number System (PRNS), that would have minimum complexity for operations such as complex multiplication, convolution, crosscorrelation and autocorrelation. The end product of this research will be the capability of designing high-performance communications, control and image processing systems to meet the future needs for higher speed.
