This research explores parallel architectures that unify classical AI and parallel distributed processing. Parallel architectures for classical AI (symbolic processing) are based on abstract machines for the -calculus or first order logic. They differ greatly from connectionist (sub-symbolic) architectures which are based on abstractions of biological systems, such as Hopfield's model of the neuron. Earlier research by the Principal Investigator suggests that a new class of systolic arrays, Lukasiewicz logic arrays (LLAs), support both symbolic and sub-symbolic computation. These preliminary results are investigated by implementing resolution, back-propagation and adaptive resonance theory algorithms for neural networks, and the RETE algorithm for production system on an LLA simulatory and a VLSI LLA. Operational four-cell and 32-cell analog VLSI LLAs were fabricated in January 1990, and will be used to test these algorithms on small data sets. A more complex 128-cell analog VLSI LLA is being designed as part of this research. The results being sought include an improved understanding of the design principles of integrated symbolic and sub-symbolic architectures, characterization of the electrical properties of analog VLSI LLAs, specification of a computational model for LLAs in general, and new algorithms for massively parallel processors based on the LLA model of computation.
