This project is to explore column Fast Fourier Transform (FFT) architecture in the bit-serial computation and multi-chip module implementation paradigms. The architecture employs flexible routing structures to allow for a wide range of FFT transform lengths and to facilitate defect and fault-tolerance. The object of this project is to build a prototype of the proposed column FFT architecture and demonstrate its performance and expendability on real-time applications (using a 10 cm Dual-Polarized Doppler radar system for real-time meteorological experiments).
