The main objective of this project is to develop a "point design" for an advanced MIMD computer system capable of achieving at least 100 TeraOPS performance with technology that will definitely become feasible in less than a decade. This design will take advantage of free-space optical technologies to produce a one-dimensional building block (BB) that implements efficiently a large, almost fully-connected system of processors. In addition to having a scaleable architecture, our BB is also technology scaleable, and therefore the number of contained processors in the BB could increase dramatically with expected improvements in optical technologies. A simple two-dimensional structure is proposed for the complete system, where the aforementioned one-dimensional BB is extended into two dimensions. With readily available technology, the word-wide optical interconnection network can be viewed as a mesh of relatively short plastic bars to which interfaces to processor cards are attached. Each processor card contains eight processors interconnected locally with an electronic crossbar. Taking advantage of higher-speed optical technologies, all eight processors share the same optical interface to the two-dimensional system. Its high-level architecture is also scaleable, because it can be extended straight forwardly for any number of dimensions larger than two.
