Dynamically configuring processor resources to match a program's needs has been shown to be an effective means of reducing CPU power dissipation without sacrificing performance. This research focuses on combining software profiling and hardware monitoring techniques to drive the reconfiguration process. The proposed approach is based on the premise that each has different strengths and weaknesses and their combination will give a better prediction of the dynamic behavior of an application. Using this information, parts of the processor can be run at reduced power or shut down completely when they are not needed and powered up just before they are.
Three methods that will be explored for reducing power are: (1) fetch halting, (2) deactivating parts of the logic that select instructions for execution and parts of the issue queue, and (3) deactivating some of the ALU's. The three components are interrelated because fetch halting can decrease the number of instructions that become ready to issue, which can cause some of the functional units to become idle. In addition, not halting the fetch unit can cause the issue queue to fill up and delay turning off queue entries. The goal of this research is to find effective ways of combining software and hardware techniques to significantly lower energy consumption over a range of architectures that may include features such as multithreading and multiple processors on a chip.
