The advent of nanometer scale CMOS technology is characterized by substantial uncertainty and unpredictability of device and circuit parameters. This threatens the existing integrated circuit design paradigm by endangering the functional correctness of the designs and by reducing yield. Statistical computer-aided design tools have been recently proposed as a way to deal with variability. Much of variability, however, is systematic rather than random, including strong spatial correlations. In that case, statistical techniques may not be sufficient to maintain good yield. An alternative and orthogonal approach is the use of adaptive circuit fabrics that seek to guarantee and enforce a specified behavior in circuits even in the presence of underlying process variation. These techniques rely on sensing the process and environmental conditions and adjusting certain circuit properties to keep the design within its specifications.
The objective of this research is to develop a formal approach to automated circuit synthesis onto adaptive circuit fabrics. The adaptive design paradigm for integrated circuits enforces predictable behavior through synthesizing adaptive circuit fabrics along with the target design. The desired outcome of this research is a methodology that preserves the foundations of a traditional design flow. The design synthesis tools themselves insert sufficient adaptivity to guarantee specified power, performance, and yield levels. This research will jointly develop the modeling and algorithmic aspects of adaptivity insertion, and will also explore new circuit-level techniques for adaptive behavior at low levels of granularity.
