As general-purpose computing moves into the age of pervasive parallelism, programmability becomes the key hurdle limiting the effective use of available computing resources. Transactional memory promises to simplify parallel programming for application programmers. However, research in Transactional Memory is being seriously hampered by the lack of a reusable open source infrastructure. The project will develop the key pieces necessary to overcome this situation: A transactional memory library built out of highly decomposed pieces will provide reusable and replaceable parts suitable for investigating tradeoffs in software TM implementations. Standardized interfaces will allow libraries conforming to the interfaces to be used in a variety of environments. TM-aware run-time analysis tools, particularly profilers and debuggers, will provide the necessary tool support for TM implementors and application programmers to understand and improve the performance of software using transactions. Interesting benchmarks, in a variety of high-level languages, will move forward our understanding of TM performance characteristics.
As general-purpose computing moves into the age of pervasive parallelism forced upon us by multicore and then manycore architectures, programmability becomes the key hurdle limiting the effective use of available computing resources. Transactional memory (TM) holds great promise as a means to simplify parallel programming for application programmers, and it has been an extremely popular research topic in the programming languages, computer architecture, and parallel programming communities in the last few years. Prior to this project, the explosion in transactional-memory research had not been matched by the distillation of key concepts and design trade-offs required to build reusable infrastructure supporting a variety of implementation techniques, programming languages, hardware platforms, and analysis tools. The key contribution of this project has been to address this deficiency via the development of interfaces and mechanisms to allow clients to use TM (and TM components) effectively while still allowing innovation in TM techniques. This project has made notable contributions in four focus areas: (1) Hardware/Software interfaces, (2) Language Design, (3) Debugging Standardization, and (4) Application Development. Hardware/Software Interfaces. A detailed exploration of mechanisms to exploit hardware TM support in the Azul appliance that was purchased in a companion grant was conducted. A full-fledged port of the multi-MLton compiler and runtime onto the Azul appliance was performed and a new garbage collection algorithm that exploits hardware TM support was devised, implemented, and evaluated. Performance analysis for both Java and ML were performed. A real-time transactional memory (RTTM) infrastructure as a time-predictable synchronization solution for chip-multiprocessors in real-time systems has been developed. This work defined hardware for time-predictable transactions and provided a bound for the maximum transaction retries. The proposed RTTM was evaluated with a simulation of a Java chip-multiprocessor. Language Design. An important outcome of this project has been the generation of new techniques to eliminate concurrency- related errors such as data races based on foundational TM principles. Traditional approaches to preventing data races rely on protecting instruction sequences with synchronization operations. Such control-centric approaches are inherently brittle as the burden is on the programmer to ensure that all concurrently accessed memory locations are consistently protected. Data-centric synchronization is an alternative approach that offloads some of the work onto the language implementation by grouping fields of objects into atomic sets to indicate that these fields always must be updated atomically. Each atomic set has associated units of work, code fragments that preserve the consistency of that atomic set. Synchronization operations are added automatically by the compiler. An extension to the Java programming language has been developed that integrates annotations for data-centric concurrency control. The resulting language, called AJ, relies on a type system that enables separate compilation and supports atomic sets that span multiple objects and that also supports full encapsulation for more efficient code generation. Our results indicate that data-centric synchronization is easy to use, enjoys low annotation overhead, and successfully preventing data races. Dynamic detection of concurrency errors depend fundamentally on the level of abstraction at which one views memory. We have shown that a dynamic concurrency tool (specifically a data-race detector) operating at the binary level can lead to false positives and false negatives in terms of a higher-level managed language. We have demonstrated how an open API can allow a language run-time system to communicate with the low-level detector to avoid sources of imprecision. Debugging Standardization If the transactional programming model is to realize its promise of simplifying the problem of writing correct and scalable concurrent programs, debuggers will have to change. As part of this project, we have implemented tm db, an open-source library to provide debuggers with a general debugging support for transactional programs. The library helps debuggers provide programmers with generic transactional debugging features, independent of the particular TM's runtime internals. In addition, it provides TM designers with a well defined interface for transactional debugging support. Related to this effort has been fundamental advances in concurrency control standardization: traditional transactional memory systems suffer from overly conservative conflict detection, yielding so-called false conflicts, because they are based on fine-grained, low-level read/write conflicts. This complicates the construction of useful debuggers. To alleviate this issue, we have defined a generalization of transactional memory in which a transaction consists of coarse-grained (abstract data-type) operations rather than simple memory read/write operations. We provide semantics for both pessimistic (e.g. transactional boosting) and optimistic (e.g. traditional TMs and recent alternatives) execution. Application Development. The PIs, along with collaborators in industry and other universities, have completed a detailed benchmark study of concurrency patterns and abstractions. Application benchmarks available today may not reflect the highly concurrent applications we anticipate in the future. They may also behave in ways that VM developers do not expect. This work provides a set of platform independent concurrency-related metrics and an in-depth observational study of current state of the art benchmarks.
