The computing world has made a generational shift to multicore as a way of addressing ?Moore?s Gap,? (the growing disparity between the performance offered by sequential processors and the scaling expections set by Moore?s law.) Two- and four-core multicores are commonplace today, with scaling to thousands of cores expected by the middle of the next decade. Unfortunately, because even two- and four-core multicores (let alone thousand-core multicores) are extremely hard to program, the widespread acceptance of multicore architectures is threatened. The multicore programming challenge is a serious issue that requires us to think about bold new approaches to architecture, programming, and software.

The ATAC project is based on one simple idea: that a low-latency, low-energy broadcast mechanism from any core to all other cores can yield a big step forward in multicore programmability. The broadcast mechanism is enabled by a novel CMOS-integrated chip-level optical interconnection using WDM (wave-division multiplexing) with multiple add/drop points. The optical interconnect augments a traditional electrical-mesh interconnect in a tiled multicore processor. Although point-to-point electrical interconnect is capable of delivering performance that is competitive with on-chip optical interconnect, it does not solve the programmability issue. Thus, in ATAC, the optical broadcast capability does not replace basic electrical interconnect, it simply augments it for programmability. Accordingly, to drastically ease programming for multicores, this project will design the ATAC computer architecture that augments an on-chip mesh network with an on-chip optical broadcast network. Such a network enables blazingly fast broadcast communication that will allow programmers to take full advantage of the multicore opportunity, even as multicores scale to thousands of cores. One way it can accomplish this is by enabling novel, distributed coherent-shared-memory architectures that provide efficient support for current programming models. Although this broadcast capability has the potential to greatly speed-up existing algorithms, its greatest appeal lies in its ability to facilitate new, easy-to-use programming models. Therefore, this project will also develop programming models and APIs (application programming interfaces) facilitated by a cheap broadcast, and evaluate the resulting impact on both performance and programming ease. The ATAC project will collaborate with UCSD's Arsenal project, which is developing massively heterogeneous multicores that drive the demand for efficient on-chip interconnects.

Project Start
Project End
Budget Start
2008-08-01
Budget End
2012-07-31
Support Year
Fiscal Year
2008
Total Cost
$1,000,000
Indirect Cost
Name
Massachusetts Institute of Technology
Department
Type
DUNS #
City
Cambridge
State
MA
Country
United States
Zip Code
02139