"This award is funded under the American Recovery and Reinvestment Act of 2009 (Public Law 111-5)."
As semiconductor technology enters the nanometer regime, modern VLSI systems face an unprecedented power crisis. Although existing power management methods have proven to be successful in many IC modules, as structural and algorithmic complexity keep increasing, these methods expose the limitations in the aspects of speed, power consumption and complexity. This project is to conduct a comprehensive study on power computing, modeling, management and optimization. By developing a generic physical model for multi-core systems, the project introduces a concept of using analog computation to solve multi-variable global power optimization problems. Analog computation provides a much faster, more accurate, real-time solution than the digital counterparts. A hardware-based approach, through a multiple-output converter design, is proposed, which works harmoniously with the power optimizer to incorporate converter-consciousness into voltage/frequency scheduling. Further extension of global and converter-conscious concepts leads to a leakage-aware universal power management solution on a single hardware platform. This project is an assimilation of multiple domains, which achieves power management from the device, to the circuit level, eventually leading to system-level power optimization.
The outcomes will benefit all power-related industries including packaging, cooling, and battery manufacture, and will lead to a series of new inventions of power-efficient electronic devices. The PI proposes a concurrent and integrated educational program that includes an improved VLSI design and power management curriculum, the introduction of an industrial tutoring program, the inclusion of undergraduate and graduate student involvement and the outreach to under-represented groups. The educational plan emphasizes diversity and will result in tremendous social benefits.
