Multi-core processing platforms have an increasingly broad range of applications. From consumer multimedia to image processing to defense applications, new designs containing large numbers of embedded cores are emerging. Network-on-Chip (NoC) has emerged as an enabling technology to integrate large numbers of embedded cores in a single die. In spite of all its advantages, a serious performance limitation in a traditional NoC arises from its planar metal interconnect-based multi-hop communication, wherein the data transfer between two distant blocks gives rise to high latency and energy dissipation. These problems can be simultaneously resolved if all or some of the wired links in a NoC are replaced by high-bandwidth single-hop wireless channels. Moreover, wireless links will alleviate the problem of wire congestion in NoCs.
Recent research has uncovered excellent emission and absorption characteristics leading to antenna-like behavior in carbon nanotubes (CNTs). This opens up new opportunities for detailed investigations regarding the possibility of building a wireless NoC (WiNoC) with CNT antennas and subsequently making the WiNoC robust against performance uncertainties inherent in nanodevices. The CAREER proposal?s overall research objective will be attained by pursuing two specific goals: 1) Establish design trade-offs and evaluate performance of WiNoC architectures; the proposed WiNoC has the capability to outperform corresponding wireline architectures; 2) Apply error control codes to make the WiNoC robust against possible malfunctions; by incorporating efficient channel coding schemes, the WiNoC will be made robust against varied types of malfunctions. The research proposed here is significant, as it addresses the on-chip interconnect problem from a fundamentally new perspective, namely by developing a wireless network at the nanoscale, as opposed to pursuing incremental improvements of relatively traditional methods of wire-line interconnection. By bringing the world of radio communication to the on-chip environment, the proposed research has the capability to transform the design of multi-core chips. The educational objective of the proposal is to recruit and retain undergraduates, high school students and students from the underrepresented groups in the engineering program. Exposure to research will be accompanied by proactive enabling activities, including broad spectrum introduction to engineering and individualized assistance to increase academic preparedness of the targeted students. The educational activities are expected to enhance research and educational opportunities for underrepresented students in the PI?s department. Advancement of such students is expected to have broad societal impact.
This award is funded under the American Recovery and Reinvestment Act of 2009 (Public Law 111-5).
