This CAREER proposal aims to investigate methods for co-optimization of integrated circuit design and the manufacturing process for improved power, performance, yield, cost and turnaround time. The semiconductor industry is likely to see several radical changes in the fabrication and device technologies in the next decade. Each of these technologies requires enormous research investment before they can see any adoption. Conventional after-the-fact changes to design methodologies and tools to technology leads to wasted effort and under-utilization of technology. Therefore, this project focuses on early assessment of circuit design restrictions imposed by technological choices. ?Equivalent scaling? improvements - perhaps as much as one full technology generation - must come from new synergies between various ?silos? of the integrated circuit design to manufacturing flow. The PI plan on developing an algorithmic method of manufacturing process optimization driven by design analyses to significantly speed up yield ramp and improve product characteristics.
Semiconductors have fueled wealth creation and technological revolution for better quality of life in the past few decades. The broader impact of the proposed research comes from enabling chip designers and manufacturers to co-develop future technologies for affordable, high-performance, high-density, low-power integrated circuits. My work will inform both the design technology and process technology roadmaps, so as to enable the electronics industry to derive maximum product benefit from underlying technology. The education component of the proposal will train a new breed of designers who are aware of process interactions and process/device engineers aware of design implications. The PI will leverage UCLA's extensive diversity and outreach resources to recruit students from female and underrepresented groups.
