CAREER: Hierarchical Process Variability Analysis of Analog Circutis Geared for Test and Diganosis
Electronic systems are proliferating into the fabric of the society with an ever increasing speed. Even before one new device technology goes into mass manufacturing, scientists start working on next generation technologies. Unfortunately, the ability to control the processing environment nears its natural limits. One direct result of this diminishing process control capability is the increasing variability in component parameters. The performance of analog electronic circuits is especially susceptible to such process variations. As the control over the process diminishes, testing the manufactured parts effectively and efficiently becomes increasingly more important. The testing process becomes all the more essential to ensure product quality and eventual success of the products in the global marketplace. The conflict resulting from the push towards higher performance while the process variability is increasing indicates a dire need for new approaches for the test automation of analog circuits that will be eventually adopted by the industry. The goal of this project is to develop hierarchical methods for process variability analysis that are geared towards test and diagnosis automation. By determining the variance of each intermediate parameter for the fault-free circuit and for many distinct faults, efficient fault-based test and diagnosis approaches can be developed. During fault injection, only a subset of the system building blocks will change. Through the hierarchical analysis approach, the changes in the circuit will prompt reprocessing of only the information that needs to be updated to ensure efficiency. While digital fault-based test and diagnosis methods have enjoyed widespread acceptance from the industry, there has been a resistance in the analog domain mostly due to the discrepancy between the design goals and the definition of what constitutes a fault. With the help of efficient process variability analysis, this project aims at breaking through this barrier by disassociating the fault injection from the pass/fail criteria. Aligning the pass/fail criteria with the specifications of the circuit will initiate a wider acceptance of automated fault-based test and diagnosis in the analog domain.
Society relies on electronic circuits in almost every aspect, from transportation to healthcare, to entertainment and work (See Figure 1). As the functionality of electronic circuits has increased so has the reliability and quality of electronic circuits. Today, it is expected that an electronic device that is purchased, no matter how mundane a task it accomplishes, works properly for at least several years. Such high quality expectations can only be met through quality control mechanisms at production lines. However, electronic circuit manufacturing process is far from perfect. In fact, even in the cleanest wafer processing rooms, a certain amount of dust particles and other defect forming impurities are expected (See Figure 2). For some of the advanced fabrication lines, almost half of the produced devices do not conform to the quality standards. Transparent to the end user, this gap between what the fabrication line can deliver and what the consumer experiences is thanks to the extensive use of electronic circuit testing and characterization. Each electronic circuit that is manufactured passes through an elaborate testing process using large and very expensive automatic test equipment (See Figure 3) to ensure that it satisfies all the functionality and performance requirements. Unfortunately, this is a very costly process. Whereas the cost of manufacturing a single transistor comes down rapidly (See Figure 4) and the number of transistors in a chip increases exponentially according to the Moore’s Law (See Figure 5), the cost of testing does not come down accordingly (See Figure 4). Hence, test cost of electronic devices is an increasing percentage of the overall product cost. This is particularly true for analog circuits, which are tested according to a set of performance specifications in an ad-hoc manner. Whereas automated, systemic design automation tools have been developed for testing digital circuits, such tools or methods are lacking for analog circuits. This not only makes their test cost even higher, but the resulting quality dependent on the knowledge and experience of the test engineer. With decreasing feature sizes and rapidly changing device characteristics, such ad-hoc quality measures are not sufficient to continue providing the high quality products to the end user. This project aims at developing a defect-based strategy for automation of the analog circuit testing process. In the core of this approach lies methodologies for defect modeling and simulation, which need to take manufacturing process variations into account. The defect simulation problem with process variations turns rapidly into a statistical simulation problem, which is very time consuming, especially for larger circuits. This is due to the fact that analog circuits display continuous behavior, rather than discrete behavior as in digital circuits, and abstraction of the overall behavior becomes particularly difficult. During the course of the project, the scientists who worked in this project have developed various algorithms, methods, and mathematical formulations to make defect-based testing possible for analog circuits (See Figure 6). This project has resulted in the development of (a) a comprehensive set of circuit-level models for observed defects in the silicon to be used in fault simulations, (b) a hierarchical and efficient statistical method for analyzing the effect of parametric faults, which only alter the circuit response incrementally, (c) hierarchical process variation model and its application to fault simulation, (d) a statistical simulation method to evaluate the product quality based model-oriented filtering to reduce the simulation time, and (e) development and proliferation of simulation flows using commercial tools at various commercial companies that produce analog electronic circuits to demonstrate the feasibility and advantages of defect-based testing.
