Aggressive technology scaling has brought new challenges to the design and manufacturing of Integrated Circuits (ICs). A mounting challenge is the modeling and characterization of power consumption in face of possible operating and manufacturing variabilities. Accurate power characterization leads to extended battery life for mobile devices and to enhanced device reliability. A second challenge arises because manufacturing is increasingly outsourced to external foundries. Verifying that the manufacturer has not inserted any malware or "Trojan" circuitry that compromises the security of the final product is essential. The proposed research provides a unifying framework for these two challenges by detailed algorithmic analysis of infrared emissions from the backside of ICs. We propose techniques to convert the infrared emissions into accurate spatial and temporal power estimates, and to use the power and infrared ?fingerprints? to verify that the chip does not contain extra circuits inserted by the manufacturer, unbeknownst to the designer, that could cause a security breach. The successful completion of this project will lead to improved power modeling and characterization tools and increased confidence that there are no added malware in manufactured chips. The project will also lead to design prototypes and a large volume of valuable data and benchmarks that will be openly disseminated via NSF-funded Trust-Hub and other web-based portals.

The methods and tools will find broad usage in the industry, government, and in academia. They will also impact the daily lives by increasing the battery lifetime and by improving the system's reliability and integrity. Education plan includes research experience for undergraduates, curriculum development, integration of material into graduate courses and emphasizing entrepreneurship within education. Recruitment and development of under-represented groups of students will be targeted.

Project Report

Power consumption is a major challenge to computing systems as it can be attested by the daily recharging of mobile systems devices. This project led to new power modeling and mapping methodologies and tools that can be used to improve the power consumption characteristics of emerging devices and systems. In addition, the research project leveraged its new power mapping methods to identify trojan circuits that may be inserted into computed devices. Trojan circuits compromise the security of critical devices, and they could be inserted by malicious entities due to outsourcing of semiconductor manufacturing. The intellectual merits produced from this project are as follows. The project led to new methods for thermal and power thermography that result in a significant improvements in power accuracy over the state-of-the-art. The project led to new methods to quantify the noise in thermography mapping and provided techniques to optimally design thermographic systems and test chips to reduce the impact of noise. The project provided the first validation of power mapping methods in the literature by developing a test circuit with the ability to control its spatial and temporal power maps. The project led, for the first time, to power maps of many-core processors under different workloads. The project led, for the first time, to validated per-block power consumption models based on performance counters. Our work is also the first to detect trojans in circuits by inspecting the thermal and power maps of the circuit deviations from design-time power estimates. The methods and results of this project are documented in eight published articles in leading conferences and journals, and one of the papers received a best paper work. These published articles were used as the basis for a published book by the PI and a thesis by one of his students. The data from this project is available on line through a Web portal created by the PI. The also PI gave numerous talks in leading academic and industrial institutions to further disseminate the methods and results of this project. The broader impacts of this project included the support the thesis work of two doctoral students. These two students are currently employed by two major semiconductor design companies. The project also led to research experiences for two undergraduate students. The funding was also used to improve the experimental setup at the PI's institution (Brown University). A patent application was filed based on the invented power mapping methods. The invented methods are being transferred to interested industrial companies, and two companies have already provided additional funding for the project.

Project Start
Project End
Budget Start
2011-07-01
Budget End
2014-06-30
Support Year
Fiscal Year
2011
Total Cost
$200,000
Indirect Cost
Name
Brown University
Department
Type
DUNS #
City
Providence
State
RI
Country
United States
Zip Code
02912