In current designs of computer chips, electrical wires are used for communication between the different components of the chip. As technology scales down into the nanometer domain, the signal delay and power consumption caused by electrical wires start to dominate the overall delay and power consumption on the chip, mainly because wires do not scale as well as other logic components. A promising alternative to using electrical wires is to use optical waveguides for communication. Using nanophotonics for on-chip communication may lead to faster signal propagation, increased bandwidth density and reduced power consumption. However, many fundamental challenges face the integration of optical devices into commercial chips. This project addresses some of these challenges and its success will have a significant impact on the semiconductor industry.
The two major challenges addressed in this project are process variations and thermal sensitivity of optical devices. The former refers to the drifts in resonance wavelengths of optical devices due to fabrication errors during the manufacturing process. The latter refers to similar drifts that result during operation due to temperature fluctuations within the chip. Both drifts are inevitable with current technology and cause the optical network to lose significant bandwidth. Instead of relying on device level innovations, the proposed research takes an architectural approach to endure and tolerate drifts in wavelength resonance. Specifically, it investigates different techniques to maximize the effective bandwidth at run-time in the presence of defects and changes in operating temperatures. These techniques treat bandwidth as a resource that is allocated, on-demand, to different nodes in a way that masks the resonance shifts of optical devices. Since the aggregated available on-chip bandwidth is usually larger than the instantaneous demand for bandwidth, the effect of the imperfect hardware is mitigated by appropriately assigning wavelengths to nodes, thus offering a reliable and near perfect optical communication layer to the other components of the system.
In this project, different techniques were studied to enable the application of nano-photonic technology to on-chip communication. These techniques are based on architecture solutions and are meant to complement device-level solutions for overcoming many of the obstacles facing practical implementations of nano-photonic interconnections. The first technique, called "MinTrim" deals with the wavelength drifting problem of sender’s and receiver’s microrings resulting from process variation (PV). This is a serious problem that reduces the available bandwidth of the optical network. MinTrim augments the network with a small number of supplementary microrings and applies an integer linear programming formulation to find a wavelength-to-microring assignment which maximizes the network’s bandwidth, while minimizing the energy consumed to tune those microrings. Extensive analysis and evaluation of MinTrim on sample photonic networks show that more than 98% of the bandwidth that could be lost because of PV-induced wavelength drifting can be restored while saving more than 30% of the tuning energy. The second technique, called BandArb, complements the static wavelength-to-microring assignment by a dynamic allocation of bandwidth to wavelengths based on the communication demands. The reallocation of bandwidth is made at a time scale determined by the change in communication patterns of applications. It is also used to deal with any drift in wavelengths that result from thermal variation of the microrings during execution. The third technique aims at reducing the power consumed in optical communication through the efficient sharing of the optical channels. Channel sharing is efficiently achieved by implementing a lightweight distributed arbitration scheme in which each channel is assigned to an owner node which has the highest priority for using it. A node can then use a channel that it does not own if its owner node is not using it. The set of nodes that can borrow any particular channel is restricted in the architecture to simplify the distributed arbitration protocol and to minimize the probability of arbitration failure. Extensive evaluation indicates that careful selection of the network nodes that can share a channel improves energy efficiency of the interconnection system by an average of 30%. The fourth technique expands the idea of channel sharing by implementing an arbitration mechanism which takes advantage of global traffic information to maximize the utilization of the communication channels. To avoid the overhead implied by a centralized arbiter, a pipelined distributed global arbitration is implemented for optical crossbars. The proposed mechanism improves energy efficiency without downgrading performance by broadcasting minimal information of channel requests and parallelizing the arbitration process through a scalable pipelined logic implemented at every node in the system. Results show that the proposed design reduces execution time by 5% and power consumption by 20% using only 50% of channels and 75% of microrings compared to system that do not use global information. The project also performed a feasibility study for applying off-chip photonics to interconnect general purpose graphic processing units (GPGPUs) to a large capacity memory based on the new Hybrid Memory Cube (HMC) technology. Such a system requires a very large bandwidth coupled with a flexible arbitration to support the new trend of moving much of the memory controller’s function away from the processor side and closer to the memory side. This study demonstrated that our channel sharing and arbitration techniques can efficiently support future off-chip nano-photonic interconnections.
