This rewsearch is on simulating MOS (metal oxide semiconductor) circuits which integrate analog and digital components. He proposes an algorithm which partitions a network of large-scale circuits into numerous small-scale subcircuits which are resistively isolated from each other. The algorithm creates a unidirectional signal path graph for the circuit. Once this is done, the global circuit simulation is decoupled into individual subcircuit analyses by following the depth levels in the graph. Part of the simulation uses event-driven relaxation, which is a combination of event-driven simulation and wave-form relaxation. He is investigating a special purpose analog simulator to analyze analog behavior. Another problem is algorithms which use piece- wise linear timing analysis to efficiently and accurately estimate digital subcircuit response.
