This research focuses on developing a new fine-grain multiprocessing architecture, the Distributed Instruction Set Architecture (DISA). DISA is based on a distributed execution model and combines pipelined and data-flow architecture to distribute multiple instructions to multiple functional units with a minimal overhead. Both homogeneous and heterogeneous functional units are being studied. The design of innovative computer architectures that utilized advanced VLSI technologies is an important area leading to the next generation of computers. The project supported addresses this important problem of using multiple functional units in the Reduced Instruction Set Architecture. The realization of find-grain parallelism at the chip and board levels will provide a powerful building block for the next generation multiprocessor. Support is strongly recommended.
