This project is concerned with the use of error control codes in computer memory systems. For the case of semiconductor random access memories (RAM), techniques for incorporating redundancy at both the on-chip and board levels is under investigation. For the case of magnetic recording devices, the issues of channel characterization, convolutional coding, and error control coding under constraints on the 1s and 0s patterns of the data are being studied. Some information theoretic aspects of the storage capacity of computer memory devices is also under consideration.
