Ultra high speed signal processing on silicon is a key requirement in applications such as computer vision, three-dimensional graphics, and phased array radar. The majority of these advanced algorithms require the use of nonlinear functions such as the reciprocal,the square-root, and trigonometric functions. This project is to research the development of Reduced Cycle Nonlinear Multi-Function Chips to meet these critical needs and to gain new knowledge in this key area. The proposed approach would reduce such nonlinear computations for 32-bit data to two clock cycles, or even a single cycle at the expense of increased complexity the approach is also function independent. It offers the potential of providing multi-function capability on a single chip/cell. The functions chosen for the proposed research, based upon a study of signal processing algorithms, are the reciprocal, square-root, sine/cosine, and the arctan functions it will also study two- argument functions. The specific functions chosen are complex (and thus two-argument) magnitude, phase, reciprocal, and logarithm functions.
