There is now potential to synthesize circuits which contain Exclusive OR (EXOR) gates without the size and speed penalties formerly associated with them. Circuits designed with EXOR technology can be efficiently implemented and are inherently testable. Three research topics are being pursued. The first is to develop a comprehensive theory for design in the EXOR technology. This theory forms the basis for development of algorithms for EXOR design. Second is to develop a tool which produces an optimal, multilevel design that is a mixture of EXOR, OR and AND gates for a given function. Hierarchal decomposition is being used to recognize different subfunctions. Algorithms are being developed for decomposition, factorization, and resynthesis. Third is to explore algorithms for optimal design using programmable gate arrays and programmable logic devices.
