The objectives of this project are: (A) Development of lower-cost techniques for concurrent detection of program execution errors caused by processor hardware faults, (B) development of lower-cost techniques for tolerating errors caused by transient faults, (C) development of theory that sets optimal bounds on the effectiveness of such techniques, and (D) development of analytical and experimental methods for evaluating the techniques against the theoretical bounds. New techniques are developed using a behavior- based-error-detection paradigm, in which a simple error-detection coprocessor monitors a program for deviations from a compiler- formed abstraction of its behavior. Existing low-cost behavior- based techniques exploit certain redundancies in program codes or in a processor's architecture. New techniques are also developed by using the methods from information theory, coding theory, and graph theory to identify new redundancies to exploit, and by using experimental data to uncover gaps between existing techniques and theoretical bounds. Concurrent error detection is necessary because transient faults are becoming more frequent as device size decreases, as the number of devices per processor and the number of processors per computer grows, and as more computers are subjected to noisy environments. The proposed work is important because, although computer dependability is increasingly important, existing concurrent-error-detection methods are too costly for all but a few applications.
