The design of structurally fault-tolerant (FT) multiprocessors, which can reconfigure around fault components to preserve interconnection structure, is an important problem in computer architecture. While a number of design methods have been proposed previously, they suffer from a lack of generality, and also fail to address practical issues like low redundancy, efficient reconfigurability and design scalability. In this project we are primarily concerned with implementing a software package based on the node-covering and automorphic methods for designing and simulating fault-tolerant systems, extending both design methods to deal with link and switch failures, devising techniques for very fast and distributed reconfiguration, developing principles for more efficient realizations of our designs, and designing systems with high average-case fault tolerance (and thus a high reliability-to-cost-ratio). We also investigate how the node- covering formulation can be applied to incorporate fault tolerance in uniprocessors, and in various types of logic circuits, especially those that can be realized as iterative arrays of simpler cells
