This research has two complementary tracks; automatic generation of analog macromodels, and algorithms for analog multi-level simulation. The focus of the first track is on integrating macromodel optimization techniques with algorithms capable of generating macromodel topologies. Algorithms for generating analog macromodels from circuit level representations are being sought. Software embodying the algorithms is tailored to fit into an ordinary simulator's description language (e.g. SPICE3). A set of macromodels for common analog functions is being constructed. The critical problem for analog multi-level simulation is the inclusion of behavioral models in a simulation environment. Issues being addressed are: the use of "C" language, simulation synchronization, and circuit partitioning. A second problem is the inclusion of digital blocks in the multi-level simulation system. Here signal conversion from one domain to another is being explored. One approach being investigated is obtaining an extension of conventional Boolean algebra to real valued signals. This offers a simple way to include both analog and digital functions in a unified simulation environment.

Agency
National Science Foundation (NSF)
Institute
Division of Computer and Communication Foundations (CCF)
Type
Standard Grant (Standard)
Application #
9211163
Program Officer
Robert B Grafton
Project Start
Project End
Budget Start
1992-09-15
Budget End
1996-02-29
Support Year
Fiscal Year
1992
Total Cost
$99,900
Indirect Cost
Name
Georgia Tech Research Corporation
Department
Type
DUNS #
City
Atlanta
State
GA
Country
United States
Zip Code
30332