9306391 Breene This project will investigate algorithm transformations between two massively parallel platforms: the Bus Automaton and the Hypercube. Earlier, Bus Automation algorithms were developed for straight line generation and recognition, rotation of Cartesian grids, and conic recognition, and Hypercube algorithms for broadcasting to subsets of processors. These algorithms exploit embeddings of Cartesian grids based on quadtree addressing scheme. The target processor subsets may be thought of as subspaces, or subgrids, of the entire (processor) space. Using embedding results and the nature of communication in the two models, fast Hypercube algorithms will be sought from existing immediate Bus Automaton algorithms, and visa versa. Given the way dimension is imposed in the two models, simulations of each machine by the other and associated complexity results are also expected. ***
