The overall goal of this research is to create a new class of synthesis tools which address the design of complex controller-data path machines under constraints of pre-defined interfaces. Because the results will be integrated with commercial EDA design tools, a design output format, which can be simulated and allows automated re-design of selected portions of the design, is being developed. In a second task, approximate sequential reachability analysis is being used to design and implement algorithms for optimizing and partitioning controller designs. The third task is to explore scheduling algorithms for both the control and data-path portions of the design. Finally, an optimizing compiler is being built. It contains algorithms which solve encoding issues for high performance designs, and performs re-scheduling of the data-path operations to minimize required resources while maintaining design behavior.
