This research is on design techniques for circuits with a power supply voltage of 0.5V. Innovations in technology, circuits, and architecture are being explored. Issues being pursued in the design of low-threshold devices are: when to shut down and efficient shutdown. Leakage currents are a major power drain in using low-threshold devices. Thus, techniques to efficiently detect and power down idling hardware are being devised. The potential of using adaptive supply voltages to exploit time-varying computational requirements is being investigated. Studies of the fundamental limits of reducing energy per computation are being developed into a general theory of DSP algorithms which can use dynamic power supply voltages. Such algorithms change computational complexity dynamically, thus saving power. Circuits which operate at supply voltages less than 0.5V are being fabricated.
