In this project, a fast simulation environment to aid code generation for pipelined and superscalar machine will be developed. The project will develop a specification language capable of describing superscalar architectures, and extend current mechanisms to permit the detection of data and control hazards, and heuristics for efficient scheduling of instructions on modern superscalar machines. The architectural specifications will be compiled into fast table-driven automata that accurately simulates values moving through pipelines, thus providing adequate information to compilers to correctly predict (and avoid) structural, data and control hazards that adversely affect the performance of the code generated. As a part of the education goals, the PI will develop a compiler laboratory that will emphasize not only the fundamentals of compiler design, but also the importance of the resource utilization to program performance. Interactive tools for learning and better understanding of automatic parsing mechanisms will be developed and adopted for teaching undergraduate level compiler techniques.
