Efficient communication is central to parallel computing. Modern multiprocessors obtain high bandwidth, low latency user-level communication through special hardware support, often implemented as a dedicated communications co-processor. Future parallel machines, including high performance networks of workstations, will be built using communications co-processors. The goal of this research is to study how the presence of a dedicated co-processor affects the performance of interprocesor communication in modern parallel machines. In particular, the project focuses on two aspects. First, it studies the impact of communications co-processors on the performance of various communication primitives and determines the architectural requirements for implementing efficiently many-to-one communication such as active messages. Second, it studies how the communications so-processor can be captured by a theoretical performance model. The goal is to derive a performance model that is realistic enough to characterize machines and accurately predict performance, but still simple enough to be used in designing and analyzing parallel algorithms. To study these questions, the project takes a vertical approach, spanning theory, applications, languages, systems software, and architecture. The project constructs a complete system which allows taking an in-depth look at how efficient communication affects all of these layers. The project leverages off the work on active messages, the parallel languages Split-C, and the LogP performance model, developed at UC Berkeley. The main experimental platform is a 64-processor Meiko CS-2, which the UCSB Computer Science Department acquired through an NSF CISE infrastructure grant. The CS-2 reflects, a modern high- performance network of workstation enthronement equipped with communications co-pocessors, making it extremely well suited for the study. The principal investigator has already implemented active mess ages and Split-C on the CS-2. The project develops a realistic model for parallel computation which captures the capabilities of communication co-processors. To create a framework to characterize communication and measure its performance, the project implements a simulator based on this model as well as a Split-C profiler. This framework is used to fine-tune applications and for architectural studies. Besides answering these important research questions, the work also provides infrastructure which is used for teaching purposes as well as by other researchers. The principal investigator ismstriving for a well balanced career as a professor in computer science, combining teaching and research. His areas of interest are parallel computing, computer architecture, languages, and compilers. His educational objective is to teach students in these fields, to get them excited about computer science and engineering, and to prepare them for a successful professional career.
