In this Research Planning Grant, the PI will develop a research plan in the area of systematic fault-tolerant design. The research is based on the idea to progressively relax the system invariant assertion in the presence of processor failures. When there are no failures, a strong assertion will be established and the system will operate at peak performance. As processors fail, weaker assertions are ensured, and the system may operate at a reduced performance. During the planning period algorithms to implement the multiple invariant assertions approach to fault- tolerance in multiple server systems will be developed. A successful completion will lead to an expansion of the research to permit a wider class of failures, as well as techniques for more complex transactions supported by the multiple server systems.
