The design of application-specific embedded computing systems is done as hardware/software co-design to jointly optimize the hardware platform and software executing on that platform. This research is investigating two aspects of the co-analysis of embedded computing systems: memory systems and sensitivity analysis. The goal is to obtain co- synthesis analysis methods which can guide synthesis decisions. Embedded computers have hierarchical memory systems with caching to keep the processors busy. Since these systems are often real-time, the software must execute to performance bounds even in the presence of caching to keep the processors busy. Models for finding bounds on execution time in the presence of caches, and make effective use of available hardware, are being studied. Also, co- synthesis algorithms need to analyze the sensitivity of the system to the characteristics of the components. Sensitivity analysis can tell how much system performance changes as the execution speed of a component changes. Sensitivity measures, which can be used in the inner loop of co-synthesis to help guide optimization choices, are being explored. The co-analysis methods are being evaluated in the context of co-synthesis algorithms.
