"CAREER: Application-driven Approach for Prototyping Run-Time Systems for Future Teraflops and Petaflops Architectures"
Nikos P. Chrisochoides
Recent feasibility studies for the next generation of Teraflops and Petaflops parallel architectures indicate that these machines will be multi-layer systems that consist of many layers of similar components for memory, processors, and interconnects with different levels of performance. Such designs will widen the latency gap between memory and CPU access to a point where no form of CPU-initiated data movement from memory will be satisfactory. To solve this, research needs to be directed towards hardware like "smart" memories that are pro-active with regard to memory-transfers, algorithms, and software. This research focuses on the development and evaluation of latency tolerant algorithms and run-time software support systems for adaptive computations on a multi-layer parallel platform that is "isomorphic" to future Teraflops and Petaflops systems. This project will have an immediate impact on Petaflops Hybrid Technology Multi-Threaded (HTMT) design by providing hardware designers with feedback based on the behavioral and structural analysis of an end-to-end unstructured and adaptive application from fracture mechanics. Also, this project will provide a testbed for training the next generation of computational scientist to effectively use such multi-layer parallel platforms and help computer engineers to understand the hardware requirements of large-scale applications.
