Directed block copolymer self-assembly is one of the promising technologies to solve the problems of conventional lithography for advanced semiconductor technologies. In contrast to conventional lithography, block copolymer self-assembly provides sub-20 nm features with lower cost and higher throughput, though defects and precise positioning are fundamental research topics that need to be addressed. The goal of this project is to address these challenges for integrating directed block copolymer self-assembly technology into practical integrated device fabrication process at the circuit level and demonstrate the fabrication of the key features for next generation devices. Block copolymer self-assembly and guided template patterning methods are proposed as a proof of concept demonstration for fabricating ultra-high density memory arrays and sub-20 nm contact holes for high-density silicon circuitry, respectively.

The broader impacts of this project cover both fundamental research and commercial manufacturing at the university-industrial interface. This project can have direct impact to promote block copolymer self-assembly technology as an economically efficient extension to conventional lithography for next generation device fabrication, benefiting the semiconductor manufacturing industry and the broader electronics industry greatly. It also will substantially stimulate the study of polymer materials design for better functional performance. As part of a outreach to the broader society, a few video clips will be produced and posted onto public websites to help the students understand the science and technology of the self-assembly. This university-industry collaboration provides an excellent training ground for the participating students in a multidisciplinary environment at the interface of fundamental research and industrial manufacturing.

Project Report

The continued scaling of feature size has brought increasingly significant challenges to conventional optical lithography, therefore opened up opportunities for alternative patterning approaches such as block copolymer self-assembly. Block copolymer DSA is a result of spontaneous microphase separation of block copolymer films, forming periodic microdomains including cylinders, spheres, and lamellae. Among all the various self-assembled structures, cylinder patterns have attracted specific interest due to their great potential for patterning electrical contacts in Integrated Circuits (ICs). With low cost and sub-20 nm feature sizes, DSA stands out as a promising candidate for next generation contact/via patterning. Through work in this project and the outreach of the PI and the students of this project, the concept of DSA guiding template alphabet is now a standard topic in DSA research. The importance of the design rule is now well accepted in the DSA research community as evidenced by the many other papers publisehd on this subject in conferences. PI and student have participated actively in formulating the industry development roadmap at the InternationalTechnology Roadmap for Semiconductors. Our research results and inputs are heavily reflected in the roadmap. See http://public.itrs.net Specifically, we have demonstrated using small topographical guiding templates to alter the natural symmetry of block copolymer and the contact hole patterning for 22 nm random logic circuits. We report a general template design strategy that relates the DSA material properties to the target technology node requirements and experimentally demonstrated DSA contact hole patterning for half adders at the 14 nm and 10 nm nodes. We also demonstrated the use of self-assembly patterning to fabricate one of the smallest metal oxide resistive switching random access memory (RRAM) in the world. A press release from Stanford and an article in the Stanford Report describe this accomplishment in layman terms. See: http://engineering.stanford.edu/news/stanford-engineers-make-first-working-prototype-memory-chip-ideal-mobile-devices

Project Start
Project End
Budget Start
2010-08-01
Budget End
2014-07-31
Support Year
Fiscal Year
2010
Total Cost
$360,000
Indirect Cost
Name
Stanford University
Department
Type
DUNS #
City
Stanford
State
CA
Country
United States
Zip Code
94305