Vande Vate This grant funds the study of capacity in semiconductor wafer fabrication facilities through two related models: fluid models, which capture system dynamics, but ignore stochastic variability and multi-class queueing networks, which describe wafer fabs in considerable detail. Analysis of Lyapunov functions applied to fluid models of the underlying queueing networks is intended to identify the sources of artificial bottlenecks that reduce the capacity of the fab below the limits imposed by individual tools. This type of analysis can also identify whether or not a given dispatch policy or family of dispatch policies is susceptible to artificial bottlenecks. More detailed brownian models of the underlying queueing networks are intended to help distinguish among alternative policies on the basis of secondary performance criteria. Finally, the grant funds efforts to work with simulation companies to implement families of practical and effective policies in their commercial software for use in wafer fabs. This research is intended to lead to improved utilization of expensive bottleneck tools in modern wafer fabs in three ways: (1) by providing better understanding of how dispatch policies lead to artificial bottlenecks that unnecessarily reduce fab capacity; (2) by identifying new efficient dispatch policies that consider the practical realities of wafer fabrication like setups and batching; and (3) by providing analytical and computational tools for for evaluating and optimizing performance criteria like average WIP and cycle time across families of efficient dispatch policies.

Project Start
Project End
Budget Start
1998-10-01
Budget End
2002-09-30
Support Year
Fiscal Year
1998
Total Cost
$341,033
Indirect Cost
Name
Georgia Tech Research Corporation
Department
Type
DUNS #
City
Atlanta
State
GA
Country
United States
Zip Code
30332