With advances in VLSI fabrication and chip placement and routing technology, the area consumed by a CPU and its traditional on-chip components has shrunk to the point of liberating significant chip area. Meanwhile, the use of reconfigurable logic such as Field-Programmable Gate Array (FPGA) devices is increasing, due to improvements in the speed and capacity of those devices. While commodity processors perform well for most applications, such processors cannot deliver the performance of a more customized approach. On the other hand, the cost of developing application-specific processors is quite expensive, and therefore not worthwhile unless many parts can be sold. Reconfigurable hardware offers an economical alternative to obtaining high performance, so that commodity processors of the future might enjoy increasingly greater levels of reconfigurability. This could bring customized logic within the reach of low-volume, high-performance applications. However, software and architectural innovations are required to make this happen. We propose to bring the advantages of custom logic to low-volume but high-performance applications by semiautomatically generating customized reconfigurable logic. By coupling soft-core commodity processors with reconfigurable logic, an application is essentially offered a liquid architecture, where the definition and implementation of the computer's instruction set, its coprocessors' functionality, and its supporting structures can be easily changed. With proper software support, liquid architectures can improve the performance of many kinds of applications, ranging from high-performance, scientific calculations to low-power, embedded systems. Our research aims to develop the software infrastructure and methodologies needed to obtain high performance of applications on reconfigurable hardware deployed in diverse settings.
