Today's embedded systems have been designed in an ad hoc manner, each system re-designed from scratch to handle new system and software requirements. As requirements for embedded systems are changing rapidly, a key challenge is to develop general design methodologies that can scale to new VLSI technologies such as multiple cores on a billion-transistor embedded chip, new power-performance targets, and new-generation software systems.
This research proposes a flow-based embedded system that focuses on an execution model based on flows and a corresponding embedded system platform based on the flow execution model. In a flow-based embedded system, the hardware dynamically adapts to (1) heterogeneity in an embedded system and (2) energy constraints while ensuring (3) real-time deadlines are met, and (4) the software is shielded from all the above hardware complexities through the flow execution model, and is thus (5) portable across hardware generations. Flows indicate all potential partition points in an application; thus they expose points that allow the systems software (and supporting hardware) to dynamically adapt the actual partitioning or parallelism in the face of real-time deadlines, energy and reliability constraints, and heterogeneity. The scope of the project includes investigating flow-parallelizing compiling techniques that automatically extract flows from sequential code, novel hardware mechanisms that ensure low-overhead dynamic execution adaptation, lightweight OS support for the flow model across a range of embedded applications.
