CRI: IAD: Acquisition of High-Performance Multi-FPGA Platform

Xinmiao Zhang

Error-correcting coding and cryptography play important roles in the reliability and security of digital communication and storage systems, and digital signal processing can extract useful signals from noisy backgrounds. Our research in the area of VLSI architecture design for these systems serves as a bridge connecting theoretical advancements to their efficient hardware implementations. Currently, our research capability is seriously limited by slow software simulations and the lack of platforms for prototyping and emulation of our designs. In this project, we proposed to acquire a CHIPit Iridium Edition V4 Field Programmable Gate Array (FPGA) platform. This platform offers great flexibility and handles design capacities of up to 4 million Application Specific Integrated Circuits (ASIC) gates. The great flexibility and large capacity of this platform facilitates simulating communication systems in a reasonable time and prototyping complicated systems in real hardware.

The reconfigurable FPGA platform combines the simplicity of software design with high-speed and large-capacity performance. This feature allows us to overcome the limitations on simulating and evaluating the increasingly complicated communication and cryptography systems, as well as verify our designs in real time implementations. Specifically, the Iridium FPGA platform will aid our research in the following ways. First it will significantly increase our simulation capability for error-correcting codes. Secondly, it will allow us to prototype large scale systems, such as soft-decision Reed-Solomon decoders, parallel long BCH encoders, cryptographic applications and electrocardiogram (ECG) signal extraction. Thirdly, it will help us to find the hardware implementation bottlenecks in the design, which are otherwise invisible from simulations. Strong educational components are also integrated in this plan. The research results enabled by the proposed acquisition will contribute to the development of a new course. In addition, this project will provide students with hands-on experience on hardware implementation, as well as increase the participation of underrepresented groups in engineering.

Agency
National Science Foundation (NSF)
Institute
Division of Computer and Network Systems (CNS)
Type
Standard Grant (Standard)
Application #
0708685
Program Officer
Chitaranjan Das
Project Start
Project End
Budget Start
2007-09-01
Budget End
2009-08-31
Support Year
Fiscal Year
2007
Total Cost
$49,800
Indirect Cost
Name
Case Western Reserve University
Department
Type
DUNS #
City
Cleveland
State
OH
Country
United States
Zip Code
44106