Due to global economy pressures, fabrication of advanced integrated circuits (ICs) is migrating to foreign foundries. It has become a common trend for many fab-less companies and government agencies to ship their designs offshore for low-cost fabrication. These trends have raised serious concerns regarding possible threats or attacks on US military systems, critical sites and even household appliances that rely on high performance chips. There are various potential vulnerabilities to such systems caused by malicious alterations of hardware processes that might make these vital systems inoperable at some future time. Such malicious manipulation of ICs slated for installation in US weapon systems cannot be tolerated.
The focus of this research is on the development of automatic test pattern generation (ATPG) and signal analysis techniques for detecting and locating malicious alterations, e.g. the insertion of Trojan circuits, during wafer probe aor package test as a means of improving the level of trustworthiness of the chip. In particular, techniques that significantly improve the resolution of quiescent current and transient current techniques for detecting and locating Trojan circuits are investigated. A second focus of the project is on the development of ATPG methods designed to detect hidden alterations of the chip, e.g., inserted or weakened wires or transistors which cause the chip to fail later in the field.
