Assuring deadlines of embedded tasks for contemporary multicore architectures is becoming increasingly difficult. Real-time scheduling relies on task migration to exploit multicores, yet migration actually reduces timing predictability due to cache warm-up overheads and increased interconnect traffic.
This work promotes a fundamentally new approach to increase the timing predictability of multicore architectures aimed at task migration in embedded environments making three major contributions:
1. The development of novel strategies to guide migration based on cost/benefit tradeoffs exploiting both static and dynamic analyses.
2. The devising of mechanisms to increase timing predictability under task migration providing explicit support for proactive and reactive real-time data movement across cores and their caches.
3. The promotion of rate- and bandwidth-adaptive mechanisms as well as monitoring capabilities to increase predictability under task migration.
The work aims at initiating a novel research direction investigating the benefits of interactions between hardware and software for embedded multicores with respect to timing predictability. This project fundamentally contributes to the research and educational infrastructure for the design and development of safety- and mission-critical embedded systems.
This project contributed mechanisms and policies in support of predictable execution in embedded multicore systems. The work broke new ground advancing the state of existing multicore designs in developing and assessing architectural support and analysis methods to specifically increase the predictability of execution times under deadline constraints. In this context, task migration was studied as it provides the means to balance resource utilization while imposing a significant challenge to predictability. This work subsumes analysis techniques for predictability under stationary execution in embedded multicores, thereby transforming the embedded landscape in making utilization of advanced multicore microprocessors feasible, even for time-critical embedded domains. Our results contribute to the initiation of a novel research direction that investigates the benefits of interactions between hardware and software for embedded multicores with respect to timing predictability. In general, timing analysis has received much more attention abroad than in the United States. There have been many initiatives in Europe and Korea, but only moderate support has been given from United States funding agencies. Yet, timing analysis is a key aspect of real-time systems. Many embedded systems, which have become key building blocks of our nation's vital infrastructure, have critical timing constraints. This project initiated of a new research directive investigating the potential of multicores, specifically their suitability for predictable execution and for static analysis techniques, both of which are required by embedded systems with timing constraints. Benefits of this work extend to various embedded system domains, specifically those with time- and safety-critical aspects. Examples range from applications in avionics, space and automotive to computer-controlled critical infrastructure components in today's society, such as the Power Grid, for which specific application studies were conducted. Finally, graduate and undergraduate students sponsored by this project gained valuable research experience from collaborating with industry.
