This award is funded under the American Recovery and Reinvestment Act of 2009 (Public Law 111-5).
The scaling of integrated circuits (ICs) into the nanometer regime has thrown up new challenges for designers, foremost among which are variations in the characteristics of IC components. Variations threaten to diminish the fundamental benefits of technology scaling, such as improvements in cost-per-transistor, performance and power consumption. Variation-aware design techniques that have been proposed thus far are being stretched to their limits, and cannot contain the incessant increase in variations. Therefore, it is important to develop new design approaches for systems that are inherently resilient to variations in the underlying components.
This project develops a framework based on adaptive applications and architectures for the design of variation-tolerant application-specific systems. It advances the state-of-the-art by (i) adopting a cross-layer approach at the system architecture and application layers, (ii) leveraging the inherent ?elasticity? of a wide class of applications to adapt to variations in the underlying hardware while still producing acceptable performance and maintaining end-user experience, and (iii) exploring a hybrid (design-time and post-fabrication) design methodology, enabling more accurate and effective system adaptation in response to variations. The developed technologies will significantly extend our ability to avail of the benefits of technology scaling in the face of increasing variations.
The efforts towards broader impact include working with the semiconductor industry to validate and transfer the developed technologies, new educational material incorporated in courses on SoC design and embedded systems, and undergraduate design projects.
