The OpenRAM project aims to provide an open-source memory compiler framework for Random-Access Memories (RAMs). Most academic Integrated Circuit (IC) design methodologies are inhibited by the availability of memories since commercially available memory compilers are often black box, not modifiable, and have limited available memory configurations. However, memories are the largest barrier to future scaling and require urgent solutions to lower leakage power consumption, improve reliability in shrinking supply voltages, and incorporate post-CMOS technologies. The OpenRAM compiler will enable research in these areas by providing a completely modifiable, verified, technology independent compiler for single-port and multi-port RAMs and many-port register files. The availability of the OpenRAM will enable research in a variety of IC-related disciplines including: computer architecture and system-on-chip (SOC) design, memory circuit and device research, and computer-aided design (CAD). Computer architects and SOC designers need access to a variety of memory configurations including specialized many-ported register files to prototype system-level implementations. Similarly, memory circuit and device researchers need a framework to prototype new circuits and devices in the context of these many configurations. Last, CAD researchers need a framework to study the optimization and analysis of power and yield of on-chip memories. In addition to the broader impact of enabling future memory system scaling, OpenRAM will also be an important education tool by allowing anyone to synthesize and utilize memory macros in standard-cell design flows and implement custom extensions.
