The primary objective of the research is to establish a unified framework for addressing timeliness and dependability requirements for ATM networks. Central to the proposed research is the virtual path/virtual circuit (VP/VC) concept in ATM networks. Based on the VP/VC concept, this project considers how to 1) equip ATM networks with fault tolerant capability by designing a fast restoration mechanism; and 2) provide ATM network users with the real-time QoS guarantees by devising a VC route selection scheme. In the context of designing a fast restoration mechanism, work will focus on 1) selecting at system initialization, for each primary VP, a backup VP (to which the traffic on the primary VP will be switched upon node/link failure) and 2) dynamically relocating routes for second-generation backup VPs or backup VPs that traverse the failed node/link upon failure. In the context of establishing VCs with real-time QoS requirements through a variable number of VPs, work will focus on 1) establishing a formal basis for testing, for each selected VC route (i.e., a sequence of Vps) if there is sufficient bandwidth on each VP on the route to meet the user-specified end-to-end delay requirements; and 2) elaborating on possible approaches to identifying a VC route which traverses a minimum number of VPs among all possible routes with sufficient bandwidth. All the component schemes proposed will be coherently incorporated into the VP layer of the ATM traffic control architecture. In conjunction with the research, the PI will incorporate the research and software implementation into teaching.
